The Feather header
Snowbird boards follow the Adafruit Feather specification: a 16-position row and a 12-position row at 2.54 mm pitch. On the Snowbird Feather 1S, Snowbird Core 1S and Snowbird Lite 1S every position is a castellated through-hole, so the same board takes plain headers, stacking headers, or solders down onto your own PCB. The Snowbird 18650 is Feather-width with the same header at one end. The Snowbird Pack is double-width with the Feather header on one long edge.
Snowbird only drives the positions it needs. Everything else passes through untouched, so a stacked host keeps its GPIO.
Long row (16 positions)
| Position | Snowbird | Default | Notes |
|---|---|---|---|
| RST | pass-through | Not used by Snowbird | |
| 3V | 3.3 V rail out | connected | Hard-wired. Up to 1.5 A continuous |
| AREF | pass-through | ||
| GND | GND | connected | |
| A0 | pass-through | ||
| A1 | pass-through | ||
| A2 | PG (power good), open drain | jumper open | Both rails in regulation |
| A3 | CHG_DONE, open drain | jumper open | Charge complete |
| A4 | pass-through | ||
| A5 | EN5V input, pulled up | jumper open | Enables the 5 V rail |
| SCK | pass-through | ||
| MOSI | pass-through | ||
| MISO | pass-through | ||
| RX | pass-through | ||
| TX | pass-through | ||
| 16th | pass-through | Unconnected on Snowbird |
Short row (12 positions)
| Position | Snowbird | Default | Notes |
|---|---|---|---|
| BAT | not connected | The host's charger must never see the Snowbird cell | |
| EN | pulled to GND | jumper closed | Turns the host's own regulator off |
| USB | not connected | Two 5 V sources in parallel otherwise | |
| 13 | pass-through | The host's LED on most Feathers | |
| 12 | pass-through | A strapping pin on ESP32 Feathers; left alone on purpose | |
| 11 | INT event interrupt, open drain | jumper open | Interrupt-capable on every current Feather |
| 10 | pass-through | ||
| 9 | pass-through | Battery sense on several Feathers | |
| 6 | pass-through | ||
| 5 | pass-through | ||
| SCL | I2C clock, 3.3 V | connected | Same bus as the Qwiic connectors |
| SDA | I2C data, 3.3 V | connected |
The four jumpered signals
PG, CHG_DONE, INT and EN5V are always available on their own labelled pads. The solder jumper beside each one adds the Feather position. All four ship open, so a bare board claims nothing on the host beyond 3V, EN, GND, SDA and SCL.
The three outputs are open drain with a 10 kΩ pull-up to the 3.3 V rail. A host that accidentally drives the position as an output is not shorted, and hosts without internal pull-ups still see a clean level.
| Signal | Direction | Idle | Active |
|---|---|---|---|
| PG | out | high when both rails are in regulation | low on loss of regulation |
| CHG_DONE | out | high while charging or discharging | low when charge is complete |
| INT | out | high | pulsed low for 1 ms on any enabled event; held low while unread if INT_LATCH is set |
| EN5V | in | pulled up, rail follows software | pull low to force the 5 V rail off |
Which position each signal uses, and why, is explained in Feather hosts.
Off the header
| Signal | Where | Notes |
|---|---|---|
| 5 V rail | 2-position 3.5 mm screw terminal (5V, GND) and a pad | Up to 2 A. Off by default; see set5V() |
| VSYS | pad and castellation | The raw system rail: battery or input, whichever the power path selects |
| VBAT | pad and castellation | The battery terminal after the BMS switch. Never on the BAT position |
| NTC | third pin of the battery connector and a pad | 10 kΩ, B = 3435 by default |
| SWD | four test pads on the underside | Programming and debug. Not needed for updates; see Firmware updates |
The 5 V rail is on a terminal block because the Feather header has no 5 V output position. The USB position is the host's input and is not connected.
Connectors
| Connector | Part | Pins |
|---|---|---|
| Battery (1S boards) | 3-pin JST-PH, 2.0 mm | BAT+, NTC, GND |
| Battery (Pack) | XT30 | BAT+, BAT− |
| Balance (Pack) | JST-XH, 2.5 mm, 5 positions | GND, C1, C2, C3, C4 |
| Solar | 2-pin JST-PH, 2.0 mm | PANEL+, GND |
| USB-C | receptacle | 5 V, 0.5 to 3 A as the source allows |
| Qwiic × 2 | JST-SH, 1.0 mm, 4 positions | GND, 3.3 V, SDA, SCL |
Both Qwiic connectors are on the same bus as the header SDA and SCL. They supply 3.3 V from the rail, so Qwiic sensors run even when no host is stacked.
Castellations and the Core 1S pad map
Every header position is castellated, so the Snowbird Feather 1S solders onto a carrier board as a module. The Snowbird Core 1S is the same board with the USB-C, solar and Qwiic connectors left off. Their signals move to a row of 1.27 mm pads along the underside so a carrier can supply them:
| Pad | Signal |
|---|---|
| 1 | VBUS (5 V in) |
| 2 | CC1 |
| 3 | CC2 |
| 4 | GND |
| 5 | PANEL+ |
| 6 | GND |
| 7 | SDA |
| 8 | SCL |
| 9 | 3.3 V |
| 10 | GND |
The CC pads carry the board's 5.1 kΩ Rd resistors, so a carrier that routes a USB-C receptacle to pads 1 to 4 gets the same current detection as the full board. A carrier that feeds 5 V from somewhere else leaves CC1 and CC2 open and the board assumes 0.5 A.
Pack extras
The Snowbird Pack adds nothing to the Feather edge. Its extra connectors sit on the wide side: XT30, JST-XH balance, and a second NTC header for a pack thermistor. A 0 Ω resistor at R_CELLS sets the cell count; it ships as 3S and the silkscreen shows the positions for 2S and 4S.